/* SPDX-License-Identifier: Apache-2.0 */

#define CSK6_PINMUX(pad, index, func)   &pinmux##pad index func

#define __PINCTRL_DEPRECATED__(msg)

// uart0
#define UART0_RXD_GPIOA_00     CSK6_PINMUX(a, 0, 2)
#define UART0_TXD_GPIOA_01     CSK6_PINMUX(a, 1, 2)
#define UART0_RXD_GPIOA_02     CSK6_PINMUX(a, 2, 2)
#define UART0_TXD_GPIOA_03     CSK6_PINMUX(a, 3, 2)
#define UART0_RXD_GPIOA_04     CSK6_PINMUX(a, 4, 2)
#define UART0_TXD_GPIOA_05     CSK6_PINMUX(a, 5, 2)
#define UART0_RXD_GPIOA_06     CSK6_PINMUX(a, 6, 2)
#define UART0_TXD_GPIOA_07     CSK6_PINMUX(a, 7, 2)
#define UART0_RXD_GPIOA_08     CSK6_PINMUX(a, 8, 2)
#define UART0_TXD_GPIOA_09     CSK6_PINMUX(a, 9, 2)
#define UART0_RXD_GPIOA_10     CSK6_PINMUX(a, 10, 2)
#define UART0_TXD_GPIOA_11     CSK6_PINMUX(a, 11, 2)
#define UART0_RXD_GPIOA_12     CSK6_PINMUX(a, 12, 2)
#define UART0_CTS_N_GPIOA_13     CSK6_PINMUX(a, 13, 2)
#define UART0_RTS_N_GPIOA_14     CSK6_PINMUX(a, 14, 2)
#define UART0_TXD_GPIOA_15     CSK6_PINMUX(a, 15, 2)
#define UART0_RXD_GPIOA_16     CSK6_PINMUX(a, 16, 2)
#define UART0_TXD_GPIOA_17     CSK6_PINMUX(a, 17, 2)
#define UART0_RXD_GPIOA_18     CSK6_PINMUX(a, 18, 2)
#define UART0_CTS_N_GPIOA_19     CSK6_PINMUX(a, 19, 2)
#define UART0_RTS_N_GPIOA_20     CSK6_PINMUX(a, 20, 2)
#define UART0_RXD_GPIOB_00     CSK6_PINMUX(b, 0, 2)
#define UART0_TXD_GPIOB_01     CSK6_PINMUX(b, 1, 2)
#define UART0_RXD_GPIOB_02     CSK6_PINMUX(b, 2, 2)
#define UART0_TXD_GPIOB_03     CSK6_PINMUX(b, 3, 2)
#define UART0_RXD_GPIOB_04     CSK6_PINMUX(b, 4, 2)
#define UART0_TXD_GPIOB_05     CSK6_PINMUX(b, 5, 2)
#define UART0_RXD_GPIOB_06     CSK6_PINMUX(b, 6, 2)
#define UART0_TXD_GPIOB_07     CSK6_PINMUX(b, 7, 2)
#define UART0_RXD_GPIOB_08     CSK6_PINMUX(b, 8, 2)
#define UART0_TXD_GPIOB_09     CSK6_PINMUX(b, 9, 2)
#define UART0_RXD_GPIOB_10     CSK6_PINMUX(b, 10, 2)
#define UART0_TXD_GPIOB_11     CSK6_PINMUX(b, 11, 2)
// uart1
#define UART1_TXD_GPIOA_00     CSK6_PINMUX(a, 0, 3)
#define UART1_RXD_GPIOA_01     CSK6_PINMUX(a, 1, 3)
#define UART1_CTS_N_GPIOA_02     CSK6_PINMUX(a, 2, 3)
#define UART1_RTS_N_GPIOA_03     CSK6_PINMUX(a, 3, 3)
#define UART1_TXD_GPIOA_04     CSK6_PINMUX(a, 4, 3)
#define UART1_RXD_GPIOA_05     CSK6_PINMUX(a, 5, 3)
#define UART1_CTS_N_GPIOA_06     CSK6_PINMUX(a, 6, 3)
#define UART1_RTS_N_GPIOA_07     CSK6_PINMUX(a, 7, 3)
#define UART1_TXD_GPIOA_08     CSK6_PINMUX(a, 8, 3)
#define UART1_RXD_GPIOA_09     CSK6_PINMUX(a, 9, 3)
#define UART1_TXD_GPIOA_10     CSK6_PINMUX(a, 10, 3)
#define UART1_RXD_GPIOA_11     CSK6_PINMUX(a, 11, 3)
#define UART1_TXD_GPIOA_12     CSK6_PINMUX(a, 12, 3)
#define UART1_RXD_GPIOA_13     CSK6_PINMUX(a, 13, 3)
// uart2
#define UART2_TXD_GPIOA_14     CSK6_PINMUX(a, 14, 3)
#define UART2_RXD_GPIOA_15     CSK6_PINMUX(a, 15, 3)
#define UART2_CTS_N_GPIOA_16     CSK6_PINMUX(a, 16, 3)
#define UART2_RTS_N_GPIOA_17     CSK6_PINMUX(a, 17, 3)
#define UART2_TXD_GPIOA_18     CSK6_PINMUX(a, 18, 3)
#define UART2_RXD_GPIOA_19     CSK6_PINMUX(a, 19, 3)
#define UART2_CTS_N_GPIOA_20     CSK6_PINMUX(a, 20, 3)
#define UART2_TXD_GPIOB_00     CSK6_PINMUX(b, 0, 3)
#define UART2_RXD_GPIOB_01     CSK6_PINMUX(b, 1, 3)
#define UART2_TXD_GPIOB_02     CSK6_PINMUX(b, 2, 3)
#define UART2_RXD_GPIOB_03     CSK6_PINMUX(b, 3, 3)
#define UART2_TXD_GPIOB_04     CSK6_PINMUX(b, 4, 3)
#define UART2_RXD_GPIOB_05     CSK6_PINMUX(b, 5, 3)
#define UART2_TXD_GPIOB_06     CSK6_PINMUX(b, 6, 3)
#define UART2_RXD_GPIOB_07     CSK6_PINMUX(b, 7, 3)
#define UART2_TXD_GPIOB_08     CSK6_PINMUX(b, 8, 3)
#define UART2_RXD_GPIOB_09     CSK6_PINMUX(b, 9, 3)
#define UART2_TXD_GPIOB_10     CSK6_PINMUX(b, 10, 3)
#define UART2_RTS_N_GPIOB_11     CSK6_PINMUX(b, 11, 3)
// uart3
#define UART3_TXD_GPIOA_00     CSK6_PINMUX(a, 0, 4)
#define UART3_RXD_GPIOA_00     CSK6_PINMUX(a, 0, 5)
#define UART3_RXD_GPIOA_01     CSK6_PINMUX(a, 1, 4)
#define UART3_TXD_GPIOA_01     CSK6_PINMUX(a, 1, 5)
#define UART3_TXD_GPIOA_04     CSK6_PINMUX(a, 4, 4)
#define UART3_RXD_GPIOA_04     CSK6_PINMUX(a, 4, 5)
#define UART3_RXD_GPIOA_05     CSK6_PINMUX(a, 5, 4)
#define UART3_TXD_GPIOA_05     CSK6_PINMUX(a, 5, 5)
#define UART3_TXD_GPIOA_06     CSK6_PINMUX(a, 6, 4)
#define UART3_RXD_GPIOA_06     CSK6_PINMUX(a, 6, 5)
#define UART3_RXD_GPIOA_07     CSK6_PINMUX(a, 7, 4)
#define UART3_TXD_GPIOA_07     CSK6_PINMUX(a, 7, 5)
#define UART3_TXD_GPIOA_08     CSK6_PINMUX(a, 8, 4)
#define UART3_RXD_GPIOA_08     CSK6_PINMUX(a, 8, 5)
#define UART3_RXD_GPIOA_09     CSK6_PINMUX(a, 9, 4)
#define UART3_TXD_GPIOA_09     CSK6_PINMUX(a, 9, 5)
#define UART3_TXD_GPIOA_10     CSK6_PINMUX(a, 10, 4)
#define UART3_RXD_GPIOA_10     CSK6_PINMUX(a, 10, 5)
#define UART3_RXD_GPIOA_11     CSK6_PINMUX(a, 11, 4)
#define UART3_TXD_GPIOA_11     CSK6_PINMUX(a, 11, 5)
#define UART3_TXD_GPIOA_12     CSK6_PINMUX(a, 12, 4)
#define UART3_RXD_GPIOA_12     CSK6_PINMUX(a, 12, 5)
#define UART3_RXD_GPIOA_13     CSK6_PINMUX(a, 13, 4)
#define UART3_TXD_GPIOA_13     CSK6_PINMUX(a, 13, 5)
// spi0
#define SPI0_CS_N_GPIOA_00     CSK6_PINMUX(a, 0, 6)
#define SPI0_MISO_GPIOA_01     CSK6_PINMUX(a, 1, 6)
#define SPI0_MOSI_GPIOA_02     CSK6_PINMUX(a, 2, 6)
#define SPI0_CLK_GPIOA_03     CSK6_PINMUX(a, 3, 6)
#define SPI0_CS_N_GPIOA_04     CSK6_PINMUX(a, 4, 6)
#define SPI0_MISO_GPIOA_05     CSK6_PINMUX(a, 5, 6)
#define SPI0_MOSI_GPIOA_06     CSK6_PINMUX(a, 6, 6)
#define SPI0_CLK_GPIOA_07     CSK6_PINMUX(a, 7, 6)
#define SPI0_CS_N_GPIOA_08     CSK6_PINMUX(a, 8, 6)
#define SPI0_MISO_GPIOA_09     CSK6_PINMUX(a, 9, 6)
#define SPI0_MOSI_GPIOA_10     CSK6_PINMUX(a, 10, 6)
#define SPI0_CLK_GPIOA_11     CSK6_PINMUX(a, 11, 6)
#define SPI0_CS_N_GPIOA_12     CSK6_PINMUX(a, 12, 6)
#define SPI0_MISO_GPIOA_13     CSK6_PINMUX(a, 13, 6)
#define SPI0_MOSI_GPIOA_14     CSK6_PINMUX(a, 14, 6)
#define SPI0_CLK_GPIOA_15     CSK6_PINMUX(a, 15, 6)
#define SPI0_CS_N_GPIOA_16     CSK6_PINMUX(a, 16, 6)
#define SPI0_MISO_GPIOA_17     CSK6_PINMUX(a, 17, 6)
#define SPI0_MOSI_GPIOA_18     CSK6_PINMUX(a, 18, 6)
#define SPI0_CLK_GPIOA_19     CSK6_PINMUX(a, 19, 6)
#define SPI0_CS_N_GPIOA_20     CSK6_PINMUX(a, 20, 6)
#define SPI0_CS_N_GPIOB_00     CSK6_PINMUX(b, 0, 6)
#define SPI0_CLK_GPIOB_01     CSK6_PINMUX(b, 1, 6)
#define SPI0_MOSI_GPIOB_02     CSK6_PINMUX(b, 2, 6)
#define SPI0_MISO_GPIOB_03     CSK6_PINMUX(b, 3, 6)
#define SPI0_CS_N_GPIOB_04     CSK6_PINMUX(b, 4, 6)
#define SPI0_CLK_GPIOB_05     CSK6_PINMUX(b, 5, 6)
#define SPI0_MOSI_GPIOB_06     CSK6_PINMUX(b, 6, 6)
#define SPI0_MISO_GPIOB_07     CSK6_PINMUX(b, 7, 6)
#define SPI0_CS_N_GPIOB_08     CSK6_PINMUX(b, 8, 6)
#define SPI0_CLK_GPIOB_09     CSK6_PINMUX(b, 9, 6)
#define SPI0_MOSI_GPIOB_10     CSK6_PINMUX(b, 10, 6)
#define SPI0_MISO_GPIOB_11     CSK6_PINMUX(b, 11, 6)
// spi1
#define SPI1_CLK_GPIOA_00     CSK6_PINMUX(a, 0, 7)
#define SPI1_CS_N_GPIOA_01     CSK6_PINMUX(a, 1, 7)
#define SPI1_MISO_GPIOA_02     CSK6_PINMUX(a, 2, 7)
#define SPI1_MOSI_GPIOA_03     CSK6_PINMUX(a, 3, 7)
#define SPI1_CLK_GPIOA_04     CSK6_PINMUX(a, 4, 7)
#define SPI1_CS_N_GPIOA_05     CSK6_PINMUX(a, 5, 7)
#define SPI1_MISO_GPIOA_06     CSK6_PINMUX(a, 6, 7)
#define SPI1_MOSI_GPIOA_07     CSK6_PINMUX(a, 7, 7)
#define SPI1_CLK_GPIOA_08     CSK6_PINMUX(a, 8, 7)
#define SPI1_CS_N_GPIOA_09     CSK6_PINMUX(a, 9, 7)
#define SPI1_MISO_GPIOA_10     CSK6_PINMUX(a, 10, 7)
#define SPI1_MOSI_GPIOA_11     CSK6_PINMUX(a, 11, 7)
#define SPI1_CLK_GPIOA_12     CSK6_PINMUX(a, 12, 7)
#define SPI1_CS_N_GPIOA_13     CSK6_PINMUX(a, 13, 7)
#define SPI1_MISO_GPIOA_14     CSK6_PINMUX(a, 14, 7)
#define SPI1_MOSI_GPIOA_15     CSK6_PINMUX(a, 15, 7)
#define SPI1_CLK_GPIOA_16     CSK6_PINMUX(a, 16, 7)
#define SPI1_CS_N_GPIOA_17     CSK6_PINMUX(a, 17, 7)
#define SPI1_MISO_GPIOA_18     CSK6_PINMUX(a, 18, 7)
#define SPI1_MOSI_GPIOA_19     CSK6_PINMUX(a, 19, 7)
#define SPI1_CLK_GPIOA_20     CSK6_PINMUX(a, 20, 7)
#define SPI1_CLK_GPIOB_00     CSK6_PINMUX(b, 0, 7)
#define SPI1_MOSI_GPIOB_01     CSK6_PINMUX(b, 1, 7)
#define SPI1_MISO_GPIOB_02     CSK6_PINMUX(b, 2, 7)
#define SPI1_CS_N_GPIOB_03     CSK6_PINMUX(b, 3, 7)
#define SPI1_CLK_GPIOB_04     CSK6_PINMUX(b, 4, 7)
#define SPI1_MOSI_GPIOB_05     CSK6_PINMUX(b, 5, 7)
#define SPI1_MISO_GPIOB_06     CSK6_PINMUX(b, 6, 7)
#define SPI1_CS_N_GPIOB_07     CSK6_PINMUX(b, 7, 7)
#define SPI1_CLK_GPIOB_08     CSK6_PINMUX(b, 8, 7)
#define SPI1_MOSI_GPIOB_09     CSK6_PINMUX(b, 9, 7)
#define SPI1_MISO_GPIOB_10     CSK6_PINMUX(b, 10, 7)
#define SPI1_CS_N_GPIOB_11     CSK6_PINMUX(b, 11, 7)
// i2c0
#define I2C0_SCL_GPIOA_00     CSK6_PINMUX(a, 0, 8)
#define I2C0_SDA_GPIOA_01     CSK6_PINMUX(a, 1, 8)
#define I2C0_SCL_GPIOA_02     CSK6_PINMUX(a, 2, 8)
#define I2C0_SDA_GPIOA_03     CSK6_PINMUX(a, 3, 8)
#define I2C0_SCL_GPIOA_04     CSK6_PINMUX(a, 4, 8)
#define I2C0_SDA_GPIOA_05     CSK6_PINMUX(a, 5, 8)
#define I2C0_SCL_GPIOA_06     CSK6_PINMUX(a, 6, 8)
#define I2C0_SDA_GPIOA_07     CSK6_PINMUX(a, 7, 8)
#define I2C0_SCL_GPIOA_08     CSK6_PINMUX(a, 8, 8)
#define I2C0_SDA_GPIOA_09     CSK6_PINMUX(a, 9, 8)
#define I2C0_SCL_GPIOA_10     CSK6_PINMUX(a, 10, 8)
#define I2C0_SDA_GPIOA_11     CSK6_PINMUX(a, 11, 8)
#define I2C0_SCL_GPIOA_12     CSK6_PINMUX(a, 12, 8)
#define I2C0_SDA_GPIOA_13     CSK6_PINMUX(a, 13, 8)
#define I2C0_SCL_GPIOA_14     CSK6_PINMUX(a, 14, 8)
#define I2C0_SDA_GPIOA_15     CSK6_PINMUX(a, 15, 8)
#define I2C0_SCL_GPIOA_16     CSK6_PINMUX(a, 16, 8)
#define I2C0_SDA_GPIOA_17     CSK6_PINMUX(a, 17, 8)
#define I2C0_SCL_GPIOA_18     CSK6_PINMUX(a, 18, 8)
#define I2C0_SDA_GPIOA_19     CSK6_PINMUX(a, 19, 8)
#define I2C0_SCL_GPIOA_20     CSK6_PINMUX(a, 20, 8)
#define I2C0_SCL_GPIOB_00     CSK6_PINMUX(b, 0, 8)
#define I2C0_SDA_GPIOB_01     CSK6_PINMUX(b, 1, 8)
#define I2C0_SCL_GPIOB_02     CSK6_PINMUX(b, 2, 8)
#define I2C0_SDA_GPIOB_03     CSK6_PINMUX(b, 3, 8)
#define I2C0_SCL_GPIOB_04     CSK6_PINMUX(b, 4, 8)
#define I2C0_SDA_GPIOB_05     CSK6_PINMUX(b, 5, 8)
#define I2C0_SCL_GPIOB_06     CSK6_PINMUX(b, 6, 8)
#define I2C0_SDA_GPIOB_07     CSK6_PINMUX(b, 7, 8)
#define I2C0_SCL_GPIOB_08     CSK6_PINMUX(b, 8, 8)
#define I2C0_SDA_GPIOB_09     CSK6_PINMUX(b, 9, 8)
#define I2C0_SCL_GPIOB_10     CSK6_PINMUX(b, 10, 8)
#define I2C0_SDA_GPIOB_11     CSK6_PINMUX(b, 11, 8)
// i2c1
#define I2C1_SDA_GPIOA_00     CSK6_PINMUX(a, 0, 9)
#define I2C1_SCL_GPIOA_01     CSK6_PINMUX(a, 1, 9)
#define I2C1_SDA_GPIOA_02     CSK6_PINMUX(a, 2, 9)
#define I2C1_SCL_GPIOA_03     CSK6_PINMUX(a, 3, 9)
#define I2C1_SDA_GPIOA_04     CSK6_PINMUX(a, 4, 9)
#define I2C1_SCL_GPIOA_05     CSK6_PINMUX(a, 5, 9)
#define I2C1_SDA_GPIOA_06     CSK6_PINMUX(a, 6, 9)
#define I2C1_SCL_GPIOA_07     CSK6_PINMUX(a, 7, 9)
#define I2C1_SDA_GPIOA_08     CSK6_PINMUX(a, 8, 9)
#define I2C1_SCL_GPIOA_09     CSK6_PINMUX(a, 9, 9)
#define I2C1_SDA_GPIOA_10     CSK6_PINMUX(a, 10, 9)
#define I2C1_SCL_GPIOA_11     CSK6_PINMUX(a, 11, 9)
#define I2C1_SDA_GPIOA_12     CSK6_PINMUX(a, 12, 9)
#define I2C1_SCL_GPIOA_13     CSK6_PINMUX(a, 13, 9)
#define I2C1_SDA_GPIOA_14     CSK6_PINMUX(a, 14, 9)
#define I2C1_SCL_GPIOA_15     CSK6_PINMUX(a, 15, 9)
#define I2C1_SDA_GPIOA_16     CSK6_PINMUX(a, 16, 9)
#define I2C1_SCL_GPIOA_17     CSK6_PINMUX(a, 17, 9)
#define I2C1_SDA_GPIOA_18     CSK6_PINMUX(a, 18, 9)
#define I2C1_SCL_GPIOA_19     CSK6_PINMUX(a, 19, 9)
#define I2C1_SDA_GPIOA_20     CSK6_PINMUX(a, 20, 9)
#define I2C1_SDA_GPIOB_00     CSK6_PINMUX(b, 0, 9)
#define I2C1_SCL_GPIOB_01     CSK6_PINMUX(b, 1, 9)
#define I2C1_SDA_GPIOB_02     CSK6_PINMUX(b, 2, 9)
#define I2C1_SCL_GPIOB_03     CSK6_PINMUX(b, 3, 9)
#define I2C1_SDA_GPIOB_04     CSK6_PINMUX(b, 4, 9)
#define I2C1_SCL_GPIOB_05     CSK6_PINMUX(b, 5, 9)
#define I2C1_SDA_GPIOB_06     CSK6_PINMUX(b, 6, 9)
#define I2C1_SCL_GPIOB_07     CSK6_PINMUX(b, 7, 9)
#define I2C1_SDA_GPIOB_08     CSK6_PINMUX(b, 8, 9)
#define I2C1_SCL_GPIOB_09     CSK6_PINMUX(b, 9, 9)
#define I2C1_SDA_GPIOB_10     CSK6_PINMUX(b, 10, 9)
#define I2C1_SCL_GPIOB_11     CSK6_PINMUX(b, 11, 9)
// i2s0
#define I2S0_ADCDAT_GPIOA_20     CSK6_PINMUX(a, 20, 15)
#define I2S0_ADCDAT_GPIOB_00     CSK6_PINMUX(b, 0, 15)
#define I2S0_LRCK_GPIOB_01     CSK6_PINMUX(b, 1, 15)
#define I2S0_BCK_GPIOB_02     CSK6_PINMUX(b, 2, 15)
#define I2S0_ADCDAT_GPIOB_03     CSK6_PINMUX(b, 3, 15)
#define I2S0_LRCK_GPIOB_04     CSK6_PINMUX(b, 4, 15)
#define I2S0_BCK_GPIOB_05     CSK6_PINMUX(b, 5, 15)
#define I2S0_ADCDAT_GPIOB_06     CSK6_PINMUX(b, 6, 15)
#define I2S0_LRCK_GPIOB_07     CSK6_PINMUX(b, 7, 15)
#define I2S0_BCK_GPIOB_08     CSK6_PINMUX(b, 8, 15)
#define I2S0_ADCDAT_GPIOB_09     CSK6_PINMUX(b, 9, 15)
#define I2S0_LRCK_GPIOB_10     CSK6_PINMUX(b, 10, 15)
#define I2S0_BCK_GPIOB_11     CSK6_PINMUX(b, 11, 15)
// i2s1
#define I2S1_MCLK_GPIOA_01     CSK6_PINMUX(a, 1, 14)
#define I2S1_BCK_GPIOA_02     CSK6_PINMUX(a, 2, 14)
#define I2S1_LRCK_GPIOA_03     CSK6_PINMUX(a, 3, 14)
#define I2S1_ADCDAT_GPIOA_04     CSK6_PINMUX(a, 4, 14)
#define I2S1_DACDAT_GPIOA_05     CSK6_PINMUX(a, 5, 14)
#define I2S1_MCLK_GPIOA_06     CSK6_PINMUX(a, 6, 14)
#define I2S1_BCK_GPIOA_07     CSK6_PINMUX(a, 7, 14)
#define I2S1_LRCK_GPIOA_08     CSK6_PINMUX(a, 8, 14)
#define I2S1_ADCDAT_GPIOA_09     CSK6_PINMUX(a, 9, 14)
#define I2S1_DACDAT_GPIOA_10     CSK6_PINMUX(a, 10, 14)
#define I2S1_MCLK_GPIOA_11     CSK6_PINMUX(a, 11, 14)
#define I2S1_BCK_GPIOA_12     CSK6_PINMUX(a, 12, 14)
#define I2S1_LRCK_GPIOA_13     CSK6_PINMUX(a, 13, 14)
#define I2S1_ADCDAT_GPIOA_14     CSK6_PINMUX(a, 14, 14)
#define I2S1_DACDAT_GPIOA_15     CSK6_PINMUX(a, 15, 14)
#define I2S1_BCK_GPIOA_16     CSK6_PINMUX(a, 16, 14)
#define I2S1_LRCK_GPIOA_17     CSK6_PINMUX(a, 17, 14)
#define I2S1_ADCDAT_GPIOA_18     CSK6_PINMUX(a, 18, 14)
#define I2S1_DACDAT_GPIOA_19     CSK6_PINMUX(a, 19, 14)
#define I2S1_BCK_GPIOA_20     CSK6_PINMUX(a, 20, 14)
#define I2S1_MCLK_GPIOB_00     CSK6_PINMUX(b, 0, 14)
#define I2S1_DACDAT_GPIOB_01     CSK6_PINMUX(b, 1, 14)
#define I2S1_ADCDAT_GPIOB_02     CSK6_PINMUX(b, 2, 14)
#define I2S1_LRCK_GPIOB_03     CSK6_PINMUX(b, 3, 14)
#define I2S1_BCK_GPIOB_04     CSK6_PINMUX(b, 4, 14)
#define I2S1_DACDAT_GPIOB_05     CSK6_PINMUX(b, 5, 14)
#define I2S1_ADCDAT_GPIOB_06     CSK6_PINMUX(b, 6, 14)
#define I2S1_LRCK_GPIOB_07     CSK6_PINMUX(b, 7, 14)
#define I2S1_BCK_GPIOB_08     CSK6_PINMUX(b, 8, 14)
#define I2S1_LRCK_GPIOB_09     CSK6_PINMUX(b, 9, 14)
#define I2S1_DACDAT_GPIOB_10     CSK6_PINMUX(b, 10, 14)
#define I2S1_ADCDAT_GPIOB_11     CSK6_PINMUX(b, 11, 14)
// i2s2
#define I2S2_MCLK_GPIOA_00     CSK6_PINMUX(a, 0, 15)
#define I2S2_BCK_GPIOA_01     CSK6_PINMUX(a, 1, 15)
#define I2S2_LRCK_GPIOA_02     CSK6_PINMUX(a, 2, 15)
#define I2S2_ADCDAT_GPIOA_03     CSK6_PINMUX(a, 3, 15)
#define I2S2_DACDAT_GPIOA_04     CSK6_PINMUX(a, 4, 15)
#define I2S2_MCLK_GPIOA_05     CSK6_PINMUX(a, 5, 15)
#define I2S2_BCK_GPIOA_06     CSK6_PINMUX(a, 6, 15)
#define I2S2_LRCK_GPIOA_07     CSK6_PINMUX(a, 7, 15)
#define I2S2_ADCDAT_GPIOA_08     CSK6_PINMUX(a, 8, 15)
#define I2S2_DACDAT_GPIOA_09     CSK6_PINMUX(a, 9, 15)
#define I2S2_MCLK_GPIOA_10     CSK6_PINMUX(a, 10, 15)
#define I2S2_BCK_GPIOA_11     CSK6_PINMUX(a, 11, 15)
#define I2S2_LRCK_GPIOA_12     CSK6_PINMUX(a, 12, 15)
#define I2S2_ADCDAT_GPIOA_13     CSK6_PINMUX(a, 13, 15)
#define I2S2_DACDAT_GPIOA_14     CSK6_PINMUX(a, 14, 15)
#define I2S2_MCLK_GPIOA_15     CSK6_PINMUX(a, 15, 15)
#define I2S2_BCK_GPIOA_16     CSK6_PINMUX(a, 16, 15)
#define I2S2_LRCK_GPIOA_17     CSK6_PINMUX(a, 17, 15)
#define I2S2_ADCDAT_GPIOA_18     CSK6_PINMUX(a, 18, 15)
#define I2S2_DACDAT_GPIOA_19     CSK6_PINMUX(a, 19, 15)
// pwm
#define GPT_PWM_0_GPIOA_00     CSK6_PINMUX(a, 0, 11)
#define GPT_PWM_1_GPIOA_01     CSK6_PINMUX(a, 1, 11)
#define GPT_PWM_2_GPIOA_02     CSK6_PINMUX(a, 2, 11)
#define GPT_PWM_3_GPIOA_03     CSK6_PINMUX(a, 3, 11)
#define GPT_PWM_4_GPIOA_04     CSK6_PINMUX(a, 4, 11)
#define GPT_PWM_5_GPIOA_05     CSK6_PINMUX(a, 5, 11)
#define GPT_PWM_6_GPIOA_06     CSK6_PINMUX(a, 6, 11)
#define GPT_PWM_7_GPIOA_07     CSK6_PINMUX(a, 7, 11)
#define GPT_PWM_0_GPIOA_08     CSK6_PINMUX(a, 8, 11)
#define GPT_PWM_1_GPIOA_09     CSK6_PINMUX(a, 9, 11)
#define GPT_PWM_2_GPIOA_10     CSK6_PINMUX(a, 10, 11)
#define GPT_PWM_3_GPIOA_11     CSK6_PINMUX(a, 11, 11)
#define GPT_PWM_4_GPIOA_12     CSK6_PINMUX(a, 12, 11)
#define GPT_PWM_5_GPIOA_13     CSK6_PINMUX(a, 13, 11)
#define GPT_PWM_6_GPIOA_14     CSK6_PINMUX(a, 14, 11)
#define GPT_PWM_7_GPIOA_15     CSK6_PINMUX(a, 15, 11)
#define GPT_PWM_0_GPIOA_16     CSK6_PINMUX(a, 16, 11)
#define GPT_PWM_1_GPIOA_17     CSK6_PINMUX(a, 17, 11)
#define GPT_PWM_2_GPIOA_18     CSK6_PINMUX(a, 18, 11)
#define GPT_PWM_3_GPIOA_19     CSK6_PINMUX(a, 19, 11)
#define GPT_PWM_4_GPIOA_20     CSK6_PINMUX(a, 20, 11)
#define GPT_PWM_0_GPIOB_00     CSK6_PINMUX(b, 0, 11)
#define GPT_PWM_7_GPIOB_01     CSK6_PINMUX(b, 1, 11)
#define GPT_PWM_6_GPIOB_02     CSK6_PINMUX(b, 2, 11)
#define GPT_PWM_5_GPIOB_03     CSK6_PINMUX(b, 3, 11)
#define GPT_PWM_4_GPIOB_04     CSK6_PINMUX(b, 4, 11)
#define GPT_PWM_3_GPIOB_05     CSK6_PINMUX(b, 5, 11)
#define GPT_PWM_2_GPIOB_06     CSK6_PINMUX(b, 6, 11)
#define GPT_PWM_1_GPIOB_07     CSK6_PINMUX(b, 7, 11)
#define GPT_PWM_0_GPIOB_08     CSK6_PINMUX(b, 8, 11)
#define GPT_PWM_7_GPIOB_09     CSK6_PINMUX(b, 9, 11)
#define GPT_PWM_6_GPIOB_10     CSK6_PINMUX(b, 10, 11)
#define GPT_PWM_5_GPIOB_11     CSK6_PINMUX(b, 11, 11)
// ir
#define IR_DATOUT_GPIOA_02     CSK6_PINMUX(a, 2, 4)
#define IR_DATIN_GPIOA_02     CSK6_PINMUX(a, 2, 5)
#define IR_DATIN_GPIOA_03     CSK6_PINMUX(a, 3, 4)
#define IR_DATOUT_GPIOA_03     CSK6_PINMUX(a, 3, 5)
#define IR_DATOUT_GPIOA_14     CSK6_PINMUX(a, 14, 4)
#define IR_DATIN_GPIOA_14     CSK6_PINMUX(a, 14, 5)
#define IR_DATIN_GPIOA_15     CSK6_PINMUX(a, 15, 4)
#define IR_DATOUT_GPIOA_15     CSK6_PINMUX(a, 15, 5)
#define IR_DATOUT_GPIOA_16     CSK6_PINMUX(a, 16, 4)
#define IR_DATIN_GPIOA_16     CSK6_PINMUX(a, 16, 5)
#define IR_DATIN_GPIOA_17     CSK6_PINMUX(a, 17, 4)
#define IR_DATOUT_GPIOA_17     CSK6_PINMUX(a, 17, 5)
#define IR_DATOUT_GPIOA_18     CSK6_PINMUX(a, 18, 4)
#define IR_DATIN_GPIOA_18     CSK6_PINMUX(a, 18, 5)
#define IR_DATIN_GPIOA_19     CSK6_PINMUX(a, 19, 4)
#define IR_DATOUT_GPIOA_19     CSK6_PINMUX(a, 19, 5)
#define IR_DATOUT_GPIOA_20     CSK6_PINMUX(a, 20, 4)
#define IR_DATIN_GPIOA_20     CSK6_PINMUX(a, 20, 5)
#define IR_DATOUT_GPIOB_00     CSK6_PINMUX(b, 0, 4)
#define IR_DATIN_GPIOB_00     CSK6_PINMUX(b, 0, 5)
#define IR_DATIN_GPIOB_01     CSK6_PINMUX(b, 1, 4)
#define IR_DATOUT_GPIOB_01     CSK6_PINMUX(b, 1, 5)
#define IR_DATOUT_GPIOB_02     CSK6_PINMUX(b, 2, 4)
#define IR_DATIN_GPIOB_02     CSK6_PINMUX(b, 2, 5)
#define IR_DATIN_GPIOB_03     CSK6_PINMUX(b, 3, 4)
#define IR_DATOUT_GPIOB_03     CSK6_PINMUX(b, 3, 5)
#define IR_DATOUT_GPIOB_04     CSK6_PINMUX(b, 4, 4)
#define IR_DATIN_GPIOB_04     CSK6_PINMUX(b, 4, 5)
#define IR_DATIN_GPIOB_05     CSK6_PINMUX(b, 5, 4)
#define IR_DATOUT_GPIOB_05     CSK6_PINMUX(b, 5, 5)
#define IR_DATOUT_GPIOB_06     CSK6_PINMUX(b, 6, 4)
#define IR_DATIN_GPIOB_06     CSK6_PINMUX(b, 6, 5)
#define IR_DATIN_GPIOB_07     CSK6_PINMUX(b, 7, 4)
#define IR_DATOUT_GPIOB_07     CSK6_PINMUX(b, 7, 5)
#define IR_DATOUT_GPIOB_08     CSK6_PINMUX(b, 8, 4)
#define IR_DATIN_GPIOB_08     CSK6_PINMUX(b, 8, 5)
#define IR_DATIN_GPIOB_09     CSK6_PINMUX(b, 9, 4)
#define IR_DATOUT_GPIOB_09     CSK6_PINMUX(b, 9, 5)
#define IR_DATOUT_GPIOB_10     CSK6_PINMUX(b, 10, 4)
#define IR_DATIN_GPIOB_10     CSK6_PINMUX(b, 10, 5)
#define IR_DATIN_GPIOB_11     CSK6_PINMUX(b, 11, 4)
#define IR_DATOUT_GPIOB_11     CSK6_PINMUX(b, 11, 5)
// gpt_trigger
#define GPT_TRIGGER_0_GPIOA_00     CSK6_PINMUX(a, 0, 10)
#define GPT_TRIGGER_1_GPIOA_01     CSK6_PINMUX(a, 1, 10)
#define GPT_TRIGGER_2_GPIOA_02     CSK6_PINMUX(a, 2, 10)
#define GPT_TRIGGER_3_GPIOA_03     CSK6_PINMUX(a, 3, 10)
#define GPT_TRIGGER_4_GPIOA_04     CSK6_PINMUX(a, 4, 10)
#define GPT_TRIGGER_5_GPIOA_05     CSK6_PINMUX(a, 5, 10)
#define GPT_TRIGGER_6_GPIOA_06     CSK6_PINMUX(a, 6, 10)
#define GPT_TRIGGER_7_GPIOA_07     CSK6_PINMUX(a, 7, 10)
#define GPT_TRIGGER_0_GPIOA_08     CSK6_PINMUX(a, 8, 10)
#define GPT_TRIGGER_1_GPIOA_09     CSK6_PINMUX(a, 9, 10)
#define GPT_TRIGGER_2_GPIOA_10     CSK6_PINMUX(a, 10, 10)
#define GPT_TRIGGER_3_GPIOA_11     CSK6_PINMUX(a, 11, 10)
#define GPT_TRIGGER_4_GPIOA_12     CSK6_PINMUX(a, 12, 10)
#define GPT_TRIGGER_5_GPIOA_13     CSK6_PINMUX(a, 13, 10)
#define GPT_TRIGGER_6_GPIOA_14     CSK6_PINMUX(a, 14, 10)
#define GPT_TRIGGER_7_GPIOA_15     CSK6_PINMUX(a, 15, 10)
#define GPT_TRIGGER_0_GPIOA_16     CSK6_PINMUX(a, 16, 10)
#define GPT_TRIGGER_1_GPIOA_17     CSK6_PINMUX(a, 17, 10)
#define GPT_TRIGGER_2_GPIOA_18     CSK6_PINMUX(a, 18, 10)
#define GPT_TRIGGER_3_GPIOA_19     CSK6_PINMUX(a, 19, 10)
#define GPT_TRIGGER_4_GPIOA_20     CSK6_PINMUX(a, 20, 10)
#define GPT_TRIGGER_0_GPIOB_00     CSK6_PINMUX(b, 0, 10)
#define GPT_TRIGGER_7_GPIOB_01     CSK6_PINMUX(b, 1, 10)
#define GPT_TRIGGER_6_GPIOB_02     CSK6_PINMUX(b, 2, 10)
#define GPT_TRIGGER_5_GPIOB_03     CSK6_PINMUX(b, 3, 10)
#define GPT_TRIGGER_4_GPIOB_04     CSK6_PINMUX(b, 4, 10)
#define GPT_TRIGGER_3_GPIOB_05     CSK6_PINMUX(b, 5, 10)
#define GPT_TRIGGER_2_GPIOB_06     CSK6_PINMUX(b, 6, 10)
#define GPT_TRIGGER_1_GPIOB_07     CSK6_PINMUX(b, 7, 10)
#define GPT_TRIGGER_0_GPIOB_08     CSK6_PINMUX(b, 8, 10)
#define GPT_TRIGGER_7_GPIOB_09     CSK6_PINMUX(b, 9, 10)
#define GPT_TRIGGER_6_GPIOB_10     CSK6_PINMUX(b, 10, 10)
#define GPT_TRIGGER_5_GPIOB_11     CSK6_PINMUX(b, 11, 10)
// io_sd
#define IO_SD_CMD_GPIOA_00     CSK6_PINMUX(a, 0, 13)
#define IO_SD_DAT0_GPIOA_01     CSK6_PINMUX(a, 1, 13)
#define IO_SD_DAT1_GPIOA_02     CSK6_PINMUX(a, 2, 13)
#define IO_SD_CLK_GPIOA_03     CSK6_PINMUX(a, 3, 13)
#define IO_SD_CMD_GPIOA_04     CSK6_PINMUX(a, 4, 13)
#define IO_SD_DAT0_GPIOA_05     CSK6_PINMUX(a, 5, 13)
#define IO_SD_DAT1_GPIOA_06     CSK6_PINMUX(a, 6, 13)
#define IO_SD_DAT2_GPIOA_07     CSK6_PINMUX(a, 7, 13)
#define IO_SD_DAT3_GPIOA_08     CSK6_PINMUX(a, 8, 13)
#define IO_SD_CLK_GPIOA_09     CSK6_PINMUX(a, 9, 13)
#define IO_SD_RSTN_GPIOA_10     CSK6_PINMUX(a, 10, 13)
#define IO_SD_WP_GPIOA_11     CSK6_PINMUX(a, 11, 13)
#define IO_SD_CD_GPIOA_12     CSK6_PINMUX(a, 12, 13)
#define IO_SD_CMD_GPIOA_13     CSK6_PINMUX(a, 13, 13)
#define IO_SD_DAT0_GPIOA_14     CSK6_PINMUX(a, 14, 13)
#define IO_SD_DAT1_GPIOA_15     CSK6_PINMUX(a, 15, 13)
#define IO_SD_DAT2_GPIOA_16     CSK6_PINMUX(a, 16, 13)
#define IO_SD_DAT3_GPIOA_17     CSK6_PINMUX(a, 17, 13)
#define IO_SD_CMD_GPIOA_18     CSK6_PINMUX(a, 18, 13)
#define IO_SD_DAT0_GPIOA_19     CSK6_PINMUX(a, 19, 13)
#define IO_SD_CLK_GPIOA_20     CSK6_PINMUX(a, 20, 13)
#define IO_SD_DAT0_GPIOB_00     CSK6_PINMUX(b, 0, 13)
#define IO_SD_CMD_GPIOB_01     CSK6_PINMUX(b, 1, 13)
#define IO_SD_CLK_GPIOB_02     CSK6_PINMUX(b, 2, 13)
#define IO_SD_DAT3_GPIOB_03     CSK6_PINMUX(b, 3, 13)
#define IO_SD_DAT2_GPIOB_04     CSK6_PINMUX(b, 4, 13)
#define IO_SD_DAT1_GPIOB_05     CSK6_PINMUX(b, 5, 13)
#define IO_SD_DAT0_GPIOB_06     CSK6_PINMUX(b, 6, 13)
#define IO_SD_CMD_GPIOB_07     CSK6_PINMUX(b, 7, 13)
#define IO_SD_CLK_GPIOB_08     CSK6_PINMUX(b, 8, 13)
#define IO_SD_DAT3_GPIOB_09     CSK6_PINMUX(b, 9, 13)
#define IO_SD_DAT2_GPIOB_10     CSK6_PINMUX(b, 10, 13)
#define IO_SD_DAT1_GPIOB_11     CSK6_PINMUX(b, 11, 13)
// GPADC
#define GPADC_0_GPIOB_06     CSK6_PINMUX(b, 6, 16)
#define GPADC_1_GPIOB_07     CSK6_PINMUX(b, 7, 16)
#define GPADC_2_GPIOB_08     CSK6_PINMUX(b, 8, 16)
#define GPADC_3_GPIOB_09     CSK6_PINMUX(b, 9, 16)
// dmic
#define DMIC01_CLK_GPIOA_00     CSK6_PINMUX(a, 0, 17)
#define DMIC01_DAT_GPIOA_01     CSK6_PINMUX(a, 1, 17)
#define DMIC23_CLK_GPIOA_02     CSK6_PINMUX(a, 2, 17)
#define DMIC23_DAT_GPIOA_03     CSK6_PINMUX(a, 3, 17)
#define DMIC01_CLK_GPIOA_04     CSK6_PINMUX(a, 4, 17)
#define DMIC01_DAT_GPIOA_05     CSK6_PINMUX(a, 5, 17)
#define DMIC23_CLK_GPIOA_06     CSK6_PINMUX(a, 6, 17)
#define DMIC23_DAT_GPIOA_07     CSK6_PINMUX(a, 7, 17)
#define DMIC01_CLK_GPIOA_08     CSK6_PINMUX(a, 8, 17)
#define DMIC01_DAT_GPIOA_09     CSK6_PINMUX(a, 9, 17)
#define DMIC23_CLK_GPIOA_10     CSK6_PINMUX(a, 10, 17)
#define DMIC23_DAT_GPIOA_11     CSK6_PINMUX(a, 11, 17)
#define DMIC01_CLK_GPIOA_12     CSK6_PINMUX(a, 12, 17)
#define DMIC01_DAT_GPIOA_13     CSK6_PINMUX(a, 13, 17)
#define DMIC23_CLK_GPIOA_14     CSK6_PINMUX(a, 14, 17)
#define DMIC23_DAT_GPIOA_15     CSK6_PINMUX(a, 15, 17)
#define DMIC01_CLK_GPIOA_16     CSK6_PINMUX(a, 16, 17)
#define DMIC01_DAT_GPIOA_17     CSK6_PINMUX(a, 17, 17)
#define DMIC23_CLK_GPIOA_18     CSK6_PINMUX(a, 18, 17)
#define DMIC23_DAT_GPIOA_19     CSK6_PINMUX(a, 19, 17)
#define DMIC01_CLK_GPIOA_20     CSK6_PINMUX(a, 20, 17)
#define DMIC01_DAT_GPIOB_00     CSK6_PINMUX(b, 0, 17)
#define DMIC01_CLK_GPIOB_01     CSK6_PINMUX(b, 1, 17)
#define DMIC01_DAT_GPIOB_02     CSK6_PINMUX(b, 2, 17)
#define DMIC01_CLK_GPIOB_03     CSK6_PINMUX(b, 3, 17)
#define DMIC01_DAT_GPIOB_04     CSK6_PINMUX(b, 4, 17)
#define DMIC01_CLK_GPIOB_05     CSK6_PINMUX(b, 5, 17)
#define DMIC01_DAT_GPIOB_07     CSK6_PINMUX(b, 7, 17)
#define DMIC01_CLK_GPIOB_08     CSK6_PINMUX(b, 8, 17)
#define DMIC01_DAT_GPIOB_09     CSK6_PINMUX(b, 9, 17)
#define DMIC01_CLK_GPIOB_10     CSK6_PINMUX(b, 10, 17)
#define DMIC01_DAT_GPIOB_11     CSK6_PINMUX(b, 11, 17)
// clkp
#define CLKP_OUT_GPIOA_07     CSK6_PINMUX(a, 7, 20)
#define CLKP_OUT_GPIOA_11     CSK6_PINMUX(a, 11, 20)
// i_pixel
#define I_PIXEL_DATA0_GPIOA_00     CSK6_PINMUX(a, 0, 20)
#define I_PIXEL_DATA1_GPIOA_01     CSK6_PINMUX(a, 1, 20)
#define I_PIXEL_DATA2_GPIOA_02     CSK6_PINMUX(a, 2, 20)
#define I_PIXEL_DATA3_GPIOA_03     CSK6_PINMUX(a, 3, 20)
#define I_PIXEL_DATA4_GPIOA_04     CSK6_PINMUX(a, 4, 20)
#define I_PIXEL_DATA5_GPIOA_05     CSK6_PINMUX(a, 5, 20)
#define I_PIXEL_DATA6_GPIOA_06     CSK6_PINMUX(a, 6, 20)
#define I_PIXEL_DATA10_GPIOA_08     CSK6_PINMUX(a, 8, 20)
#define I_PIXEL_DATA11_GPIOA_09     CSK6_PINMUX(a, 9, 20)
#define I_PIXEL_DATA7_GPIOA_10     CSK6_PINMUX(a, 10, 20)
#define I_PIXEL_CLK_GPIOA_12     CSK6_PINMUX(a, 12, 20)
#define I_PIXEL_CLK_GPIOA_15     CSK6_PINMUX(a, 15, 20)
#define I_PIXEL_DATA8_GPIOA_19     CSK6_PINMUX(a, 19, 20)
#define I_PIXEL_DATA9_GPIOA_20     CSK6_PINMUX(a, 20, 20)
#define I_PIXEL_DATA0_GPIOB_00     CSK6_PINMUX(b, 0, 20)
#define I_PIXEL_DATA1_GPIOB_01     CSK6_PINMUX(b, 1, 20)
#define I_PIXEL_DATA2_GPIOB_02     CSK6_PINMUX(b, 2, 20)
#define I_PIXEL_DATA3_GPIOB_03     CSK6_PINMUX(b, 3, 20)
#define I_PIXEL_DATA4_GPIOB_04     CSK6_PINMUX(b, 4, 20)
#define I_PIXEL_DATA5_GPIOB_05     CSK6_PINMUX(b, 5, 20)
#define I_PIXEL_DATA6_GPIOB_06     CSK6_PINMUX(b, 6, 20)
#define I_PIXEL_DATA7_GPIOB_07     CSK6_PINMUX(b, 7, 20)
#define I_PIXEL_DATA8_GPIOB_08     CSK6_PINMUX(b, 8, 20)
#define I_PIXEL_DATA9_GPIOB_09     CSK6_PINMUX(b, 9, 20)
// i_reset
#define I_RESETN_P_IN_GPIOA_16     CSK6_PINMUX(a, 16, 20)
// sync
#define I_H_SYNC_GPIOA_13     CSK6_PINMUX(a, 13, 20)
#define I_V_SYNC_GPIOA_14     CSK6_PINMUX(a, 14, 20)
#define I_H_SYNC_GPIOA_17     CSK6_PINMUX(a, 17, 20)
#define I_V_SYNC_GPIOA_18     CSK6_PINMUX(a, 18, 20)
// gpt_pause
#define GPT_PAUSE_GPIOA_00     CSK6_PINMUX(a, 0, 12)
#define GPT_PAUSE_GPIOA_02     CSK6_PINMUX(a, 2, 12)
#define GPT_PAUSE_GPIOA_04     CSK6_PINMUX(a, 4, 12)
#define GPT_PAUSE_GPIOA_06     CSK6_PINMUX(a, 6, 12)
#define GPT_PAUSE_GPIOA_08     CSK6_PINMUX(a, 8, 12)
#define GPT_PAUSE_GPIOA_10     CSK6_PINMUX(a, 10, 12)
#define GPT_PAUSE_GPIOA_12     CSK6_PINMUX(a, 12, 12)
#define GPT_PAUSE_GPIOA_14     CSK6_PINMUX(a, 14, 12)
#define GPT_PAUSE_GPIOA_16     CSK6_PINMUX(a, 16, 12)
#define GPT_PAUSE_GPIOA_18     CSK6_PINMUX(a, 18, 12)
#define GPT_PAUSE_GPIOA_20     CSK6_PINMUX(a, 20, 12)
#define GPT_PAUSE_GPIOB_00     CSK6_PINMUX(b, 0, 12)
#define GPT_PAUSE_GPIOB_02     CSK6_PINMUX(b, 2, 12)
#define GPT_PAUSE_GPIOB_04     CSK6_PINMUX(b, 4, 12)
#define GPT_PAUSE_GPIOB_06     CSK6_PINMUX(b, 6, 12)
#define GPT_PAUSE_GPIOB_08     CSK6_PINMUX(b, 8, 12)
#define GPT_PAUSE_GPIOB_10     CSK6_PINMUX(b, 10, 12)
// gpt_clk_t1
#define GPT_CLK_T1_GPIOA_01     CSK6_PINMUX(a, 1, 12)
#define GPT_CLK_T1_GPIOA_03     CSK6_PINMUX(a, 3, 12)
#define GPT_CLK_T1_GPIOA_05     CSK6_PINMUX(a, 5, 12)
#define GPT_CLK_T1_GPIOA_07     CSK6_PINMUX(a, 7, 12)
#define GPT_CLK_T1_GPIOA_09     CSK6_PINMUX(a, 9, 12)
#define GPT_CLK_T1_GPIOA_11     CSK6_PINMUX(a, 11, 12)
#define GPT_CLK_T1_GPIOA_13     CSK6_PINMUX(a, 13, 12)
#define GPT_CLK_T1_GPIOA_15     CSK6_PINMUX(a, 15, 12)
#define GPT_CLK_T1_GPIOA_17     CSK6_PINMUX(a, 17, 12)
#define GPT_CLK_T1_GPIOA_19     CSK6_PINMUX(a, 19, 12)
#define GPT_CLK_T1_GPIOB_01     CSK6_PINMUX(b, 1, 12)
#define GPT_CLK_T1_GPIOB_03     CSK6_PINMUX(b, 3, 12)
#define GPT_CLK_T1_GPIOB_05     CSK6_PINMUX(b, 5, 12)
#define GPT_CLK_T1_GPIOB_07     CSK6_PINMUX(b, 7, 12)
#define GPT_CLK_T1_GPIOB_09     CSK6_PINMUX(b, 9, 12)
#define GPT_CLK_T1_GPIOB_11     CSK6_PINMUX(b, 11, 12)
// sw
#define STAR_SWCLKTCK_GPIOA_00     CSK6_PINMUX(a, 0, 0)
#define STAR_SWDTMS_GPIOA_01     CSK6_PINMUX(a, 1, 0)
#define STAR_SWCLKTCK_GPIOA_02     CSK6_PINMUX(a, 2, 1)
#define STAR_SWDTMS_GPIOA_03     CSK6_PINMUX(a, 3, 1)
#define STAR_SWCLKTCK_GPIOA_04     CSK6_PINMUX(a, 4, 1)
#define STAR_SWDTMS_GPIOA_05     CSK6_PINMUX(a, 5, 1)
#define STAR_SWCLKTCK_GPIOA_06     CSK6_PINMUX(a, 6, 1)
#define STAR_SWDTMS_GPIOA_07     CSK6_PINMUX(a, 7, 1)
#define STAR_SWCLKTCK_GPIOA_08     CSK6_PINMUX(a, 8, 1)
#define STAR_SWDTMS_GPIOA_09     CSK6_PINMUX(a, 9, 1)
#define STAR_SWDTMS_GPIOA_15     CSK6_PINMUX(a, 15, 1)
#define STAR_SWCLKTCK_GPIOA_16     CSK6_PINMUX(a, 16, 1)
#define STAR_SWDTMS_GPIOA_17     CSK6_PINMUX(a, 17, 1)
// cp_jtag
#define CP_JTAG_TCK_GPIOA_10     CSK6_PINMUX(a, 10, 0)
#define CP_JTAG_TDI_GPIOA_11     CSK6_PINMUX(a, 11, 0)
#define CP_JTAG_TDO_GPIOA_12     CSK6_PINMUX(a, 12, 0)
#define CP_JTAG_TMS_GPIOA_13     CSK6_PINMUX(a, 13, 0)
#define CP_JTAG_TRST_GPIOA_14     CSK6_PINMUX(a, 14, 0)
#define CP_JTAG_TCK_GPIOA_18     CSK6_PINMUX(a, 18, 1)
#define CP_JTAG_TDI_GPIOA_19     CSK6_PINMUX(a, 19, 1)
#define CP_JTAG_TDO_GPIOA_20     CSK6_PINMUX(a, 20, 1)
#define CP_JTAG_TRST_GPIOB_10     CSK6_PINMUX(b, 10, 1)
#define CP_JTAG_TMS_GPIOB_11     CSK6_PINMUX(b, 11, 1)
// cbt_guard
#define CBT_GUARD_O_GPIOA_10     CSK6_PINMUX(a, 10, 16)
#define CBT_GUARD_O_GPIOA_11     CSK6_PINMUX(a, 11, 16)
#define CBT_GUARD_O_GPIOA_12     CSK6_PINMUX(a, 12, 16)
#define CBT_GUARD_O_GPIOA_13     CSK6_PINMUX(a, 13, 16)
#define CBT_GUARD_O_GPIOA_14     CSK6_PINMUX(a, 14, 16)
#define CBT_GUARD_O_GPIOB_00     CSK6_PINMUX(b, 0, 16)
#define CBT_GUARD_O_GPIOB_01     CSK6_PINMUX(b, 1, 16)
#define CBT_GUARD_O_GPIOB_02     CSK6_PINMUX(b, 2, 16)
#define CBT_GUARD_O_GPIOB_03     CSK6_PINMUX(b, 3, 16)
#define CBT_GUARD_O_GPIOB_04     CSK6_PINMUX(b, 4, 16)
#define CBT_GUARD_O_GPIOB_05     CSK6_PINMUX(b, 5, 16)

// AON_PINMUX(AON: Always on) Function0
#define AON_GPIO_WKUP0_GPIOB_00     CSK6_PINMUX(b, 0, 0x80)
#define AON_GPIO_WKUP1_GPIOB_01     CSK6_PINMUX(b, 1, 0x80)
#define AON_GPIO_WKUP2_GPIOB_02     CSK6_PINMUX(b, 2, 0x80)
#define AON_LXT_IN_GPIOB_03         CSK6_PINMUX(b, 3, 0x80)
#define AON_LXT_OUT_GPIOB_04        CSK6_PINMUX(b, 4, 0x80)
#define AON_KEY_GPIOB_05            CSK6_PINMUX(b, 5, 0x80)

// AON_PINMUX(AON: Always on) Function1
#define AON_DMIC01_DAT_GPIOB_00     CSK6_PINMUX(b, 0, (0x80 | 0x01))
#define AON_DMIC01_CLK_GPIOB_01     CSK6_PINMUX(b, 1, (0x80 | 0x01))
#define AON_DMIC01_DAT_GPIOB_02     CSK6_PINMUX(b, 2, (0x80 | 0x01))
#define AON_DMIC01_CLK_GPIOB_03     CSK6_PINMUX(b, 3, (0x80 | 0x01))
#define AON_DMIC01_DAT_GPIOB_04     CSK6_PINMUX(b, 4, (0x80 | 0x01))
#define AON_DMIC01_CLK_GPIOB_05     CSK6_PINMUX(b, 5, (0x80 | 0x01))

// AON_PINMUX(AON: Always on) Function2
#define AON_GPIO_WKUP_GPIOB_00     CSK6_PINMUX(b, 0, (0x80 | 0x02))
#define AON_GPIO_WKUP_GPIOB_01     CSK6_PINMUX(b, 1, (0x80 | 0x02))
#define AON_GPIO_WKUP_GPIOB_02     CSK6_PINMUX(b, 2, (0x80 | 0x02))
#define AON_GPIO_WKUP_GPIOB_03     CSK6_PINMUX(b, 3, (0x80 | 0x02))
#define AON_GPIO_WKUP_GPIOB_04     CSK6_PINMUX(b, 4, (0x80 | 0x02))
#define AON_GPIO_WKUP_GPIOB_05     CSK6_PINMUX(b, 5, (0x80 | 0x02))

// AON_PINMUX(AON: Always on) Function3
#define AON_DMIC01_DAT_GPIOB_00     CSK6_PINMUX(b, 0, (0x80 | 0x03))
#define AON_DMIC01_CLK_GPIOB_01     CSK6_PINMUX(b, 1, (0x80 | 0x03))
#define AON_DMIC01_DAT_GPIOB_02     CSK6_PINMUX(b, 2, (0x80 | 0x03))
#define AON_DMIC01_CLK_GPIOB_03     CSK6_PINMUX(b, 3, (0x80 | 0x03))
#define AON_DMIC01_DAT_GPIOB_04     CSK6_PINMUX(b, 4, (0x80 | 0x03))
#define AON_DMIC01_CLK_GPIOB_05     CSK6_PINMUX(b, 5, (0x80 | 0x03))

// AON_PINMUX(AON: Always on) Function4
#define AON_CBT0_GPIOB_00           CSK6_PINMUX(b, 0, (0x80 | 0x04))
#define AON_CBT1_GPIOB_01           CSK6_PINMUX(b, 1, (0x80 | 0x04))
#define AON_CBT2_GPIOB_02           CSK6_PINMUX(b, 2, (0x80 | 0x04))
#define AON_CBT3_GPIOB_03           CSK6_PINMUX(b, 3, (0x80 | 0x04))
#define AON_CBT4_GPIOB_04           CSK6_PINMUX(b, 4, (0x80 | 0x04))
#define AON_CBT5_GPIOB_05           CSK6_PINMUX(b, 5, (0x80 | 0x04))

// AON_PINMUX(AON: Always on) Function5
#define AON_NORMAL_GPIOB_00         CSK6_PINMUX(b, 0, (0x80 | 0x05))
#define AON_NORMAL_GPIOB_01         CSK6_PINMUX(b, 1, (0x80 | 0x05))
#define AON_NORMAL_GPIOB_02         CSK6_PINMUX(b, 2, (0x80 | 0x05))
#define AON_NORMAL_GPIOB_03         CSK6_PINMUX(b, 3, (0x80 | 0x05))
#define AON_NORMAL_GPIOB_04         CSK6_PINMUX(b, 4, (0x80 | 0x05))
#define AON_NORMAL_GPIOB_05         CSK6_PINMUX(b, 5, (0x80 | 0x05))


